天津大学教师个人主页系统蒋佳佳 26. Jun Xue, Fajie Duan, Jiajia Jiang*, Yanchao Li, Jianfu Yuan, Xianquan Wang, Parallel cyclic redundancy check Verilog program generating method based on Matlab, Journal of Computer Applications, vol. 36, no.9, pp.2503-2507, 2016. Personal Profile

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Jiajia Jiang

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School of Precision Instrument and Optoelectronics Engineering

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Associate professor

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仪器科学与技术

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Selected Papers

Current position: Personal Profile > Academic Achievements > Selected Papers

26. Jun Xue, Fajie Duan, Jiajia Jiang*, Yanchao Li, Jianfu Yuan, Xianquan Wang, Parallel cyclic redundancy check Verilog program generating method based on Matlab, Journal of Computer Applications, vol. 36, no.9, pp.2503-2507, 2016.

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Pre One:27. Jianfu Yuan, Han Yan, Bo Hua, Jiajia Jiang*, Fajie Duan, Yanchao Li, Jun Xue, Wendan Yuan, Research of high speed serial stream receiver based on FPGA, Nanotechnology and Precision Engineering, vol.14, no.3, pp.196-200, 2016.

Next One:25. Jiajia Jiang*, Hua Zhao, Yu Zhang, Multi-channel intelligent remote control power saver based on 80C51, Electronic Technology Application, vol. 11, no.1, pp.28-42, 2009.