Language
中文
Mobile

Qiang Liu

School

School of Microelectronics

Professional Title

Professor

Discipline

电子科学与技术

Other Contact Information

Selected Papers

Current position: Personal Profile > Academic Achievements > Selected Papers

T. Li and Q. Liu, "A Low Cost Partial Scan Approach Based on Balanced Sequential Graph Transformation," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 5, pp. 1109-1113, May 2018, doi: 10.1109/TCAD.2017.2729348.

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Pre One:Liu, Q. and Qian, H. (2017), Fast and accurate circuit delay model for FPGA architectural exploration. IET Comput. Digit. Tech., 11: 117-123. https://doi.org/10.1049/iet-cdt.2016.0053

Next One:Q. Liu, J. Liu, R. Sang, J. Li, T. Zhang and Q. Zhang, "Fast Neural Network Training on FPGA Using Quasi-Newton Optimization Method," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 8, pp. 1575-1579, Aug. 2018, doi: 10.1109/TVLSI.2018.2820016.

Address: No. 92, Weijin Road, Nankai District, Tianjin Zip Code: 300072

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