Language
中文
Mobile

Qiang Liu

School

School of Microelectronics

Professional Title

Professor

Discipline

电子科学与技术

Other Contact Information

Selected Papers

Current position: Personal Profile > Academic Achievements > Selected Papers

Liu, Q. and Qian, H. (2017), Fast and accurate circuit delay model for FPGA architectural exploration. IET Comput. Digit. Tech., 11: 117-123. https://doi.org/10.1049/iet-cdt.2016.0053

Hits:

Translation or Not:no

Pre One:H. Fan, X. Niu, Q. Liu and W. Luk, "F-C3D: FPGA-based 3-dimensional convolutional neural network," 2017 27th International Conference on Field Programmable Logic and Applications (FPL), Ghent, 2017, pp. 1-4, doi: 10.23919/FPL.2017.8056779.

Next One:T. Li and Q. Liu, "A Low Cost Partial Scan Approach Based on Balanced Sequential Graph Transformation," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 5, pp. 1109-1113, May 2018, doi: 10.1109/TCAD.2017.2729348.

Address: No. 92, Weijin Road, Nankai District, Tianjin Zip Code: 300072

Click: / The Last Update Time:--