Z. Gao, J. Xiao, Q. Liu, A. Ullah and P. Reviriego, "A Methodology for the Design of Fault Tolerant Parallel Digital Channelizers on SRAM-FPGAs," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 5, pp. 2003-2015, May 2023, doi: 10.1109/TCSI.2023.3239040.

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