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- 教师名称：刘强
- 教师拼音名称：Qiang Liu
- 性别：男
- 学科：电子科学与技术
- 职称：教授
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Y. Hao, Y. Gan, B. Yu, Q. Liu, S. -S. Liu and Y. Zhu, "BLITZCRANK: Factor Graph Accelerator for Motion Planning," 2023 60th ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2023, pp. 1-6, doi: 10.1109/DAC56929.2023.10247780.
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Y. Han and Q. Liu, "HPTA: A High Performance Transformer Accelerator Based on FPGA," 2023 33rd International Conference on Field-Programmable Logic and Applications (FPL), Gothenburg, Sweden, 2023, pp. 27-33, doi: 10.1109/FPL60245.2023.00012.
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Z. Gao, Y. Cheng, Q. Liu, A. Ullah and P. Reviriego, "Efficient Protection of FPGA Implemented LDPC Decoders Against Single Event Upsets (SEUs) on Configuration Memories," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 9, pp. 3770-3780, Sept. 2023, doi: 10.1109/TCSI.2023.3279444.
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Qiang Liu, Yuhui Hao, Weizhuang Liu, Bo Yu*, Yiming Gan, Jie Tang*, Shao-Shan Liu and Yuhao Zhu*, "An Energy Efficient and Runtime Reconfigurable Accelerator for Robotic Localization," in IEEE Transactions on Computers, vol. 72, no. 7, pp. 1943-1957, 1 July 2023, doi: 10.1109/TC.2022.3230899.
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Z. Gao, J. Xiao, Q. Liu, A. Ullah and P. Reviriego, "A Methodology for the Design of Fault Tolerant Parallel Digital Channelizers on SRAM-FPGAs," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 5, pp. 2003-2015, May 2023, doi: 10.1109/TCSI.2023.3239040.
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Deng, Quan, Liu, Qiang, “Field-programmable gate array acceleration of the Tersoff potential in LAMMPS,” in ENGINEERING REPORTS,
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Liu, Zhengyan and Liu, Qiang and Yan, Shun and Cheung, Ray C.C. , “An Efficient FPGA-Based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning”, ACM Trans. Reconfigurable Technol. Syst., Sept. 2023
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Y. Mao and Q. Liu, "An FPGA-based Mix-grained Sparse Training Accelerator," 2023 International Conference on Field Programmable Technology (ICFPT), Yokohama, Japan, 2023, pp. 276-277, doi: 10.1109/ICFPT59805.2023.00043.
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Zhang M, Li H, Wang P, Liu Q. Parity Check Based Fault Detection against Timing Fault Injection Attacks. Electronics. 2022; 11(24):4082.
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M. Shu and Q. Liu, "LCAM: Low-Cost Approximate Multiplier Design on FPGA," 2022 International Conference on Field-Programmable Technology (ICFPT), Hong Kong, 2022, pp. 1-1, doi: 10.1109/ICFPT56656.2022.9974375.
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H. Tang and Q. Liu, "MPFA: An Efficient Multiple Faults-Based Persistent Fault Analysis Method for Low-Cost FIA," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 9, pp. 2821-2834, Sept. 2022, doi: 10.1109/TCAD.2021.3117512.
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Zhaohui Guo; Zhen Gao; Qiang Liu; Chinmay Chakraborty; Qiaozhi Hua; Keping Yu, "RNS-Based Adaptive Compression Scheme for the Block Data in the Blockchain for IIoT," in IEEE Transactions on Industrial Informatics, vol. 18, no. 12, pp. 9239-9249, Dec. 2022, doi: 10.1109/TII.2022.3182766.
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Q. Liu, K. Masselos and G. A. Constantinides, "Data Reuse Exploration for FPGA Based Platforms Applied to the Full Search Motion Estimation Algorithm," 2006 International Conference on Field Programmable Logic and Applications, Madrid, 2006, pp. 1-6, doi: 10.1109/FPL.2006.311242.
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Q. Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung, "Automatic On-chip Memory Minimization for Data Reuse," 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007), Napa, CA, 2007, pp. 251-260, doi: 10.1109/FCCM.2007.18.
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Qiang Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung, "Combining data reuse exploitationwith data-level parallelization for FPGA targeted hardware compilation: A geometric programming framework," 2008 International Conference on Field Programmable Logic and Applications, Heidelberg, 2008, pp. 179-184, doi: 10.1109/FPL.2008.4629928.
